[vc_row el_class=”inner-body-content” css=”.vc_custom_1667216094721{padding-top: 30px !important;padding-bottom: 20px !important;}”][vc_column][vc_custom_heading text=”Pre-requisite(s)” font_container=”tag:h2|font_size:20px|text_align:left” use_theme_fonts=”yes” css=”.vc_custom_1667216079678{margin-top: 0px !important;}”][vc_column_text]Digital Logic Design (EE-2313)[/vc_column_text][vc_custom_heading text=”Recommended Book(s)” font_container=”tag:h2|font_size:20px|text_align:left” use_theme_fonts=”yes”][vc_column_text]“The 8088 And 8086 Microprocessors: Programming, Interfacing, Software, Hardware And Applications” By Walter A. Triebel And Avtar Singh, Prentice Hall, 4th Edition, 2003

Hennessy, J. L, And D.A. Patterson, D. A., Computer Organization And Design, The Hardware/software Interface, 4^th   Edition[/vc_column_text][vc_custom_heading text=”Reference Book(s)” font_container=”tag:h2|font_size:20px|text_align:left” use_theme_fonts=”yes”][vc_column_text]

[/vc_column_text][vc_custom_heading text=”COURSE OBJECTIVES” use_theme_fonts=”yes”][vc_column_text]This course introduces students with the internal architecture, Assembly Language programming concepts and I/O interfaces of 8086 & 8088 microprocessors. Students will develop comprehensive understanding of the Intel x86 software programming model and instruction set. Course will focus on Intel x86 assembly programming techniques. Students will also learn 8086/8088 modes of operations, interfacing of memory and I/O devices, pipe lining and Cache memory hierarchy.[/vc_column_text][vc_custom_heading text=”COURSE LEARNING OUTCOMES (CLO)” font_container=”tag:h3|text_align:left” use_theme_fonts=”yes”][vc_column_text]

CLO:1. Illustrate basics of computer architecture and I/O devices interfacing with emphasis on 8086/8088 processor architecture (Level: C2)

CLO:2. Write assembly programs in 8086/8088 Assembly Language and develop problem solutions in low-level programming (Level: C5)

CLO:3. Demonstrate concepts related to computer memory hierarchy, cache organization, pipelining and direct memory access (DMA) (Level: C3)

[/vc_column_text][vc_custom_heading text=”COURSE CONTENTS” use_theme_fonts=”yes”][vc_custom_heading text=”Introduction to Computer Architecture” font_container=”tag:h3|text_align:left” use_theme_fonts=”yes”][vc_column_text]

• Computer Organization& Architecture
• Number Systems Review

[/vc_column_text][vc_custom_heading text=”8086 & 8088 Microprocessors Software Architecture” font_container=”tag:h3|text_align:left” use_theme_fonts=”yes”][vc_column_text]

• 8086/8088 internal Micro-architecture
• Programming Model of 8086/8088 Microprocessors
• Segment Registers , Data Registers & Status Register
• Memory Address Space & Stack

[/vc_column_text][vc_custom_heading text=”Assembly & Machine Language Programming” font_container=”tag:h3|text_align:left” use_theme_fonts=”yes”][vc_column_text]

• High Level  vs. Low Level Programming Paradigm
• 8086/8088 Addressing Modes

[/vc_column_text][vc_custom_heading text=” 8086/8088 Assembly Instruction Set” font_container=”tag:h3|text_align:left” use_theme_fonts=”yes”][vc_column_text]

• Data Transfer Instructions
• Arithmetic , Logical & Shift Instructions
• Control Flow & Jump Instructions
• Subroutines & Call Instruction
• Loop & String Handling Instructions

[/vc_column_text][vc_custom_heading text=” 8088/8086 I/O Interfaces and DMA” font_container=”tag:h3|text_align:left” use_theme_fonts=”yes”][vc_column_text]

• Evolution of Intel Processors
• 8086/8088 Control Signals & Bus Cycles
• Memory organization &Memory Device Interfaces
• Direct Memory Access (DMA)

[/vc_column_text][vc_custom_heading text=”Pipelining” font_container=”tag:h3|text_align:left” use_theme_fonts=”yes”][vc_column_text]

• Pipelining Overview
• Pipeline Stages & Operation
• Performance improvement with pipelining

[/vc_column_text][vc_custom_heading text=” Memory Organization and Cache hierarchy” font_container=”tag:h3|text_align:left” use_theme_fonts=”yes”][vc_column_text]

• Principal of Locality
• Elements of Cache Design
• Cache Types& Levels

[/vc_column_text][vc_custom_heading text=”Peripheral Interfaces” font_container=”tag:h3|text_align:left” use_theme_fonts=”yes”][vc_column_text]

• Serial & Parallel Communication Interface

[/vc_column_text][vc_custom_heading text=”MAPPING OF CLOs TO PROGRAM LEARNING OUTCOMES” font_container=”tag:h2|font_size:20px|text_align:left” use_theme_fonts=”yes”][vc_column_text css=”.vc_custom_1667216068951{margin-bottom: 0px !important;}”]

CLOs/PLOs	CLO:1	CLO:2	CLO:3
PLO:1 (Engineering Knowledge)	√		√
PLO:2 (Problem Analysis)
PLO:3 (Design and Development of Solutions)		√
PLO:4 (Investigation)
PLO:5 (Modern Tool Usage)
PLO:6 (The Engineer and Society)
PLO:7 (Environment and Sustainability)
PLO:8 (Ethics)
PLO:9 (Individual and Team Work)
PLO:10 (Communication)
PLO:11 (Project Management)
PLO:12 (Life Long Learning)

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